module systol_W2 (EXP) is ------------------------------------------------------------------------------- process MAIN [Y: WIRE] is hide X: WIRE in par X in GENERATOR [X] || ARRAY [X, Y] (W1, W2, W3, W4, W5, W6, W7) end par end hide end process ------------------------------------------------------------------------------- process GENERATOR [X: WIRE] is X (X1); X (X2); X (X3); X (X4); X (X5); X (X6); X (X7); X (X8); X (X9); X (X10); X (X11); X (X12); X (X13); X (X14); X (X15); X (X16); X (X17); X (X18); X (X19); X (X20); X (X21); X (X22); X (X23); X (X24); X (X25); X (X26); stop end process ------------------------------------------------------------------------------- process ZERO [Y: WIRE] is loop Y (0 of EXP) end loop end process ------------------------------------------------------------------------------- process ARRAY [X0, Y7: WIRE] (W1, W2, W3, W4, W5, W6, W7:EXP) is hide X1, X2, X3, X4, X5, X6, X7, Y0, Y1, Y2, Y3, Y4, Y5, Y6: WIRE in par Y0 -> ZERO [Y0] || Y0, X1, Y1 -> CELL [X0, Y0, X1, Y1] (W7, 7) || X1, Y1, X2, Y2 -> CELL [X1, Y1, X2, Y2] (W6, 6) || X2, Y2, X3, Y3 -> CELL [X2, Y2, X3, Y3] (W5, 5) || X3, Y3, X4, Y4 -> CELL [X3, Y3, X4, Y4] (W4, 4) || X4, Y4, X5, Y5 -> CELL [X4, Y4, X5, Y5] (W3, 3) || X5, Y5, X6, Y6 -> CELL [X5, Y5, X6, Y6] (W2, 2) || X6, Y6 -> CELL [X6, Y6, X7, Y7] (W1, 1) end par end hide end process ------------------------------------------------------------------------------- process CELL [X_IN, Y_IN, X_OUT, Y_OUT: WIRE] (W: EXP, in var K: NAT) is var X, Y: EXP in loop X_IN (?X); if K > 1 then K := K - 1 else Y_IN (?Y); Y_OUT (Y + (W * X)) end if; X_OUT (X) end loop end var end process ------------------------------------------------------------------------------- end module